구성원

교원
구성원

교원

Jae Joon Kim김재준

  • 인공지능 및 컴퓨터
  • 집적회로 설계

연구주제

반도체 회로 및 시 스템 설계 기술 연구

  • 연구분야인공지능 및 컴퓨터, 집적회로 설계
  • 연구실융합반도체설계연구실

연구실 소개

  • 융합반도체설계연구실은 다양한 학문 간의 융합기 술을 시스템화하기 위해 필요한 반도체 회로 및 시 스템 설계기술을 연구합니다. 특히, 웨어러블 디바 이스, 헬스케어 및 의료 기기, 환경센서, 스마트센 서 분야를 주요 응용으로 하며 설계된 아날로그/혼 성모드 신호처리칩을 기반으로 인공지능을 연계한 시스템 및 플랫폼까지 연구개발하고 있습니다.

Curriculum Vitae

  • 2011-Present: Professor, Department of Electrical Engineering, UNIST
  • 2009-2011: Research Engineer II, Georgia Institute of Technology, Atlanta, GA
  • 2005-2011: Deputy Director, Ministry of Knowledge Economy / Ministry of Information & Communication
  • 2003-2005: Senior Engineer, Hynix Semiconductor (Magnachip), Seoul
  • 2001-2002: Design Engineer, Berkana Wireless Inc., San Jose, CA

Education

  • 2003: Ph.D., Electrical Engineering, KAIST, Daejeon, Korea
  • 1998: M.S., Electrical Engineering, KAIST, Daejeon, Korea
  • 1996: B.S., Electronics Engineering, Hanyang Univ., Seoul, Korea

Research Keywords and Topics

  • Advanced Intelligent IoT Sensor Platform with Self-Recognition and Self-Calibration
  • Reconfigurable Attachable Heterogeneous Multi-Sensor Patch Platform
  • Self-Powered Power-Sensor Integrated Circuits and Systems
  • Innovative Wearable Healthcare Devices and Brain-to-Computer Interfaces

Publications (selected)

  • H. Y. Chae, J. Cho, R. Purbia, C. S. Park, H. Kim, Y. Lee, J. M. Baik, J. J. Kim, “Environment-Adaptable Edge-Computing Multi-Gas Sensor Device with Analog-Assisted Continual Learning Schemes.,” IEEE Transactions on Industrial Electronics, Vol. 70, Issue 10, pp. 10720-10729;, October 2023.
  • C. S. Park, H. Kim, K. Lee, D. S. Keum, D. P. Jang, J. J. Kim, “A Baseline-Tracking Single-Channel I/Q Impedance Plethysmogram IC for Neckband-Based Blood Pressure and Cardiovascular Monitoring,” IEEE Journal of Solid-State Circuits, Vol. 58, Issue 7, pp. 2040-2052, July 2023.
  • H. Kim, M. Kim, K. Lee, S. Cho, C. S. Park, S. Song, D. S. Keum, D. P. Jang, J. J. Kim, “A Behind-The-Ear Patch-Type Mental Healthcare Integrated Interface with 275-Fold Input Impedance Boosting and Adaptive Multimodal Compensation Capabilities.” IEEE International Solid-State Circuits Conference (ISSCC), Digest of Technical Papers, pp. 478-479, San Francisco, CA, Feb. 2023.

Awards/ Honors/ Memberships

  • Board Member, Korean Sensor Society
  • Board Member, Institute of Semiconductor Engineers
  • Board Member, Institute of Electronics and Information Engineers (IEIE)
  • Steering Committee, IEIE RF/Analog Integrated Circuits Society
  • Steering Committee, IEIE SoC Design Society
  • Senior Member, Institute of Electrical and Electronics Engineers (IEEE)
  • Non-executive Board Member, Korea Communication Agency (2018-2021)
  • Personnel Committee, Ulsan Technopark (2013-2020)

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